AMD Will Push 'Piledriver' Beyond 4GHz Using Resonant Clock Mesh Technology
Advanced Micro Devices (AMD) plans to use resonant clock mesh technology developed by Cyclos Semiconductor to push its Piledriver processor line to 4GHz and beyond, the company announced at the International Solid State Circuits Conferences (ISSCC) in San Francisco. Cyclos is the only supplier of resonant clock mesh IP, which AMD has licensed and implemented into its x86 Piledriver core for Opteron server processors and Accelerated Processing Units (APUs).
"We were able to seamlessly integrate the Cyclos IP into our existing clock mesh design process so there was no risk to our development schedule," said Samuel Naffziger, Corporate Fellow at AMD. "Silicon results met our power reduction expectations, we incurred no increase in silicon area, and we were able to use our standard manufacturing process, so the investment and risk in adopting resonant clock mesh technology was well worth it as all of our customers are clamoring for more energy efficient processor designs."
Resonant clock mesh technology will not only lead to higher clocked processors, but also significant power savings. According to Cyclos, the new technology is capable of reducing power consumption by 10 percent or bumping up clockspeeds by 10 percent without altering the TDP. But what exactly is resonant clock mesh technology?
"Cyclos resonant clock mesh technology employs on-chip inductors to create an electric pendulum, or 'tank circuit', formed by the large capacitance of the clock mesh in parallel with the Cyclos inductors," Cyclos explains. "The Cyclos inductors and clock control circuits 'recycle' the clock power instead of dissipating it on every clock cycle like in a clock tree implementation, which results in a reduction in total IC power consumption of up to 10 percent.
Source: design-reuse.com
Cyclos and AMD didn't go into too much detail about Piledriver, though they did say it will consist of a 4GHz+ x86-64 core built on a 32nm CMOS process. For all kinds of geeky details on resonant clock mesh technology, check out this Wiki article posted by Dan Ganousis, vice president of Cyclos Semiconductor.
"We were able to seamlessly integrate the Cyclos IP into our existing clock mesh design process so there was no risk to our development schedule," said Samuel Naffziger, Corporate Fellow at AMD. "Silicon results met our power reduction expectations, we incurred no increase in silicon area, and we were able to use our standard manufacturing process, so the investment and risk in adopting resonant clock mesh technology was well worth it as all of our customers are clamoring for more energy efficient processor designs."
Resonant clock mesh technology will not only lead to higher clocked processors, but also significant power savings. According to Cyclos, the new technology is capable of reducing power consumption by 10 percent or bumping up clockspeeds by 10 percent without altering the TDP. But what exactly is resonant clock mesh technology?
"Cyclos resonant clock mesh technology employs on-chip inductors to create an electric pendulum, or 'tank circuit', formed by the large capacitance of the clock mesh in parallel with the Cyclos inductors," Cyclos explains. "The Cyclos inductors and clock control circuits 'recycle' the clock power instead of dissipating it on every clock cycle like in a clock tree implementation, which results in a reduction in total IC power consumption of up to 10 percent.
Source: design-reuse.com
Cyclos and AMD didn't go into too much detail about Piledriver, though they did say it will consist of a 4GHz+ x86-64 core built on a 32nm CMOS process. For all kinds of geeky details on resonant clock mesh technology, check out this Wiki article posted by Dan Ganousis, vice president of Cyclos Semiconductor.
