AMD Ryzen 9000 Series Zen 5 CPU Details Suggest Key Architecture Upgrades

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AMD's current-generation Ryzen 7000 desktop processors came out in September of 2022. That's over 16 months ago. Intel's gearing up to launch its own Arrow Lake second-generation tiled processors on the desktop, and naturally, AMD is readying its competitor: the Zen 5 architecture and the CPUs bearing it, likely to be the Ryzen 9000 family.

We've heard in the past that AMD's Zen 5 architecture is going to represent a major departure from the current and previous Zen architectures. Zen 4 is still essentially an evolution of the original Zen design at heart, while Zen 5 is supposed to be significantly redesigned, although the degree of separation from previous AMD Ryzen processors varies depending on who you ask.

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The list of capabilties from the GCC patch.

Well, we have the first truly concrete details of any real note on AMD's Zen 5 CPUs now thanks to an "enablement" patch submitted to the GNU Compiler Collection, or GCC. A lot of people will say things about the relevance of the C language family in general, and GCC in particular, but the fact is that it still underpins the vast majority of Linux. Naturally, AMD has to make sure GCC understands Zen 5 to get the best performance on its new CPUs.

The new patch adds "-march=znver5" support, meaning that the compiler can target Zen 5 as a microarchitecture. As the handsome and talented Michael Larabel says over at Phoronix, the most notable part of the patch is that it enumerates the capabilities of "znver5", including all of the x86 instruction set extensions that it supports. This confirms that Zen 5 will add support for AVXVNNI, MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, and PREFETCHI.

That's a whole bunch of jargon that probably doesn't mean anything to you unless you're a developer, but AVXVNNI are some of the AVX-512 neural network instructions that Intel branded "DLBoost". Meanwhile, VP2INTERSECT is arguably one of the most useful instructions in the AVX-512 ISA extension, with the ability to rapidly accelerate things like database searches or ray tracing calculations.

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Bigos' analysis of the Zen 5 details revealed in the GCC patch.

Over on the Anandtech forums, member Bigos dug into the patch and sorted out a few more salient details about the Zen 5 architecture. Compared to Zen 4, Zen 5 will apparently have 50% more ALU pipes, an extra AGU pipe, double the floating-point store pipes, and grossly-expanded capabilities for all of the processor's functional units.

These architecture changes should improve per-clock performance, and give some credence to the rumors of greatly-increased instructions-per-clock (IPC) throughput on Zen 5. However, we're still dubious on the "30% IPC" improvement claim that's been bandied about by many people, including RedGamingTech. We're expecting something along the lines of AMD's own forecasts; probably more like a 10-15% increase in single-threaded IPC, perhaps with some corner cases trending higher.

If AMD can maintain the same clock rates as the current-generation Ryzen 7000 CPUs on its next-generation parts, that's still going to be a really solid generational uplift over what are already very fast CPUs. Here's looking forward to AMD's Zen 5 CPUs, expected to appear later this year.
Tags:  AMD, (nasdaq:amd), zen 5, gcc