New stacking tech increases capacity, performance of Flash memory

Samsung says it has developed a new "3D" package, which reduces space requirements and increases performance capabilities of today's multi-chip packages. The company plans to use the technology to improve its NAND Flash packaging starting in 2007.

Memory stacks are widely use as a solution in multi-chip packages (MCP) today as they offer semiconductor firms to bump the capacity of their chips without increasing the footprint of chips. When more and more transistors require more and more area space on a package and scaling of the production process does not provide enough real estate, the industry uses a technology called "die-stacking."