AMD Barcelona Architecture Launch: Native Quad-Core
Architectural Details (Cont.)
Since the Barcelona core, AMD's first native quad-core processor, is targeted to the data center and enterprise server markets, the positioning of this processor is squarely pitched on the all-mighty "performance-per-watt" metric that we've heard so much of from both camps as of late. However, although energy efficiency is a recurring theme, AMD is still planning to offer "SE" high performance models, scaling up to 2.3GHz in Q4 of this year.
Looking deeper into Barcelona's quad-core, single die architecture, we've learn that the cores themselves have been revamped considerably. Here are a few of the key salient points of Barcelona's new core micro-engines.
- Barcelona's floating point scheduler now supports 36 128-bit operations, increased over the previous Opteron 64-bit architecture
- Barcelona now supports 128-bit SSE, an upgrade from the previous 64-bit architecture
- Two SSE operations and one SSE move can be processed per cycle
- Processor instruction fetch has been increased from 16 to 32 bytes
- Advanced branch prediction with built in a 512-entry indirect branch predictor
- Data cache bandwidth has increased from 1 x 64-bit loads per cycle to 1 x 128-bit loads per cycle
- L2 cache / memory controller bandwidth has been increased from 64-bits per clock to 128-bits per clock
In addition, the Barcelona architecture will now support dynamic clock gating on a per-core basis. Though core voltages won't be managed independently, the clock speed of each core can throttle back when idle, providing significant power savings. And AMD's "CoolCore" technology allows for functional blocks of each core to be shut off when not in use, further improving power efficiency. You may have heard of AMD's "Dual Dynamic Power Management" technology referred to as "split power planes" in the past. We should note that to fully take advantage of AMD's "Dual Dynamic Power Management" technology, a next-gen platform must be used. Users that drop a Barcelona based Opteron in an existing socket 1207 platform with not have support for split power planes, because current motherboards lack the necessary support.
New Acronyms - AMD ACP:
Finally, in a move reminiscent of their campaign from long ago to debunk the "megahertz myth" with processor performance rating-type model numbers, AMD is announcing a new power consumption metric called "ACP" or "Average CPU Power". AMD claims historically that they took a much more conservative approach with providing measurements for traditional TDP (Thermal Design Power) ratings, opting to list worst case, maximum numbers versus Intel's average or "typical" rating guidelines. As a result, AMD's processor architecture, at least on paper, appeared significantly more power hungry than it was in practice.
In essence, an Opteron ACP rating of 75 watts, for example, indicates that the processor under typical conditions and workloads will consume 75 watts of power. In addition, AMD is suggesting that customers should relate their ACP rating of a processor to a comparable TDP rating on a competitive Intel CPU. With respect to TDP, AMD notes that those "worst case" numbers are still going to be available but are not a level, fair comparison to an Intel processor TDP rating, since Intel doesn't report worst case characterization data in their TDP listing. Though we haven't tested these claims in the lab just yet ourselves, we'll note this for future reference and report real-world metrics as they become available.