Introducing The Xeon E7 v3
Like its high-end desktop processors, the Xeon E7-8800 / 4800 v3 product families are based on the Haswell-EX CPU core. These new Xeons, however, offer a plethora of other enhancements and are packing significantly more cores than any current desktop processor. The highest-end Xeon E7-8800 series processors, for example, are packing up to 18 cores.
The Xeon E7-8800 / 4800 v3 product families are a “tock” in Intel’s release cadence. Previous generation Xeon E7 v2 processors were based on the Ivy Bridge-EX core, while the new E7 v3 parts are based on Haswell-EX, though both are manufactured on Intel’s 22nm process node. Next generation Broadwell-EX based Xeons will make the move to 14nm.
Xeon E7-8800 / 4800 v3 processors are designed for mission critical workloads and big-data analytics applications. As we’ve mentioned, the processors have 20% more cores than the previous generation, but they’ve also got 20% more last-level cache (LLC) as well. These new processors, however, are pin compatible with E7 v2 series.
Intel’s focus with these processors was on performance-per-watt and maximum memory addressability, though the TDPs for the highest-end parts has increased somewhat. Intel points out that while some processors’ TDPs may have increased slightly, because the chips have integrated voltage regulators, and as such some VREGs on compatible motherboards won’t be used, total platform power is essentially flat.
Xeon E7-8800 / 4800 v3 series processors have 32-lanes of PCIe 3.0 connectivity per socket, TSX is enabled in all SKUs, they offer support for both DDR3 and DDR4 memory (though, not simultaneously), and can address up to 6TB of memory in a 4-socket configuration or 12TB in an 8-socket setup. Intel has also goosed the QPI speeds up to 9.6GT/s and enhanced its Run Sure technologies (Run Sure in an umbrella term for all of Intel’s RAS technologies in the platform) with a second generation MCA recovery engine (second gen) and added, or enhanced, features like address mirroring and rank sparing. In the past when using address range memory mirroring to protect data, half of the system’s memory would get used for the mirror (think of it like RAID 1 for RAM). With this new platform, however, only a particular memory range can be mirrored, freeing more memory for the rest of the system. For real-time, big data analytics and other data-heavy enterprise applications, having more system memory is beneficial. The range of the mirror can be determined at the BIOS levels or via the OS.